Line-Rate Network Applications in P4 Switches
碩士 === 國立交通大學 === 網路工程研究所 === 107 === This thesis designs and develops two P4 (Programming Protocol-Independent Packet Processor) applications in commercial P4 switches. The first P4 application is packet aggregation and disaggregation. We propose a novel approach that utilizes the header manipulati...
| Main Authors: | , |
|---|---|
| Other Authors: | |
| Format: | Others |
| Language: | en_US |
| Published: |
2019
|
| Online Access: | http://ndltd.ncl.edu.tw/handle/62rgew |