| Summary: | 碩士 === 國立臺北科技大學 === 材料科學與工程研究所 === 106 === According to the Moore’s law, the feature size of integrated circuit is constantly shrink down. When the line width of aluminum was shrink down to 180nm, it has problem of high resistance, severe RC delay and electromigration effect. The aluminum wire was replaced by copper wire, because the copper wire has a better electric conductivity to improve the above problem. In order to prevent Cu fast diffusion into the silicon layer and the performance of device degradation, a robust diffusion barrier is strongly required. The good diffusion barrier should meet some certain criteria such as uniform thickness, high thermal stability and good adhesion between Cu interconnect and the silicon layer. In the study, Zinc is chosen as the material for self-forming diffusion barrier due to its highly reactive with the silicon layer under elevated temperature. The Cu-Zn alloy film followed by thermal annealing, Zn diffuse to the silicon layer and the Zn-silicate is formed at the interface between Cu interconnect and silicon layer.
In the work, a non-aqueous solution that deep eutectic solvent, were used for the deposition bath. Pulse-current deposition was applied for the co-deposition of copper-zinc film on the Pt wafers and Cu wafers.
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