Design and Implementation of Leakage Compensation Circuit for 5T SRAM
博士 === 國立中山大學 === 電機工程學系研究所 === 106 === To reduce the SRAM area, a 5T single-ended SRAM cell has been proposed by our laboratory before. This dissertation presents two compensation designs for the 5T single-ended SRAM to reduce the power consumption of consumer electronics, e.g., smartphones. The f...
Main Authors: | Deng-Shian Wang, 王登賢 |
---|---|
Other Authors: | Chua-Chin Wang |
Format: | Others |
Language: | en_US |
Published: |
2017
|
Online Access: | http://ndltd.ncl.edu.tw/handle/48vp43 |
Similar Items
-
Single-ended Disturb-free 5T Load-less 4Kb SRAM with Leakage Current Sensor and Compensation Circuit
by: Sih-Yu Chen, et al.
Published: (2013) -
Low Computing Leakage, Wide-Swing Output Compensation Circuit for Linearity Improvement in SRAM Multi-Row Read Computing-in-Memory
by: Gu, Z., et al.
Published: (2022) -
The analysis and design of SRAM sense amplifier circuits
by: 張書賢
Published: (2003) -
Leakage Current Stability Analysis for Subthreshold SRAM
by: Bai, N., et al.
Published: (2022) -
Development of A Rapid Readout System for CEA Detection and An SRAM with Leakage Sensor and Read Delay Compensation
by: Chiang-Hsiang Liao, et al.
Published: (2014)