On Table Reduction for WDF based Analog Circuit Emulation on FPGA
碩士 === 國立中央大學 === 電機工程學系 === 106 === With the advance of process technologies, the design of Very-Large-Scale Integration (VLSI) circuits is becoming more complex. System on Chip (SOC) has become one possible option of VLSI design. Because SOC designs usually contain both analog and digital circuits...
Main Authors: | , |
---|---|
Other Authors: | |
Format: | Others |
Language: | zh-TW |
Published: |
2018
|
Online Access: | http://ndltd.ncl.edu.tw/handle/73j2a4 |