| Summary: | 碩士 === 國立交通大學 === 電子研究所 === 106 === In this thesis, we fabricated the interfacial layers (ILs) with the incorporation of metal Yttrium (Y) in the HfO2-based (IL/HfO2/AlOx/HfO2/TiN) gate stack. First, the three different IL processes on Ge were investigated: (1) oxygen plasma oxidation (PO), (2) oxygen plasma oxidation followed by sputtering Y 0.6 nm (PO/Y), (3) sputtering Y 0.6 nm followed by oxygen plasma oxidation (Y/PO), which had significantly different electrical performances. Compared to the MOSCAPs with the PO IL, the PO/Y case had similar Cacc (accumulation capacitance) values but higher interface states density (Dit) values; the Y/PO case had lower Dit values but lower Cacc values. Based on electrical characteristics and material analyses, we proposed the material interaction models to illustrate the experimental results. In the Y/PO case, oxygen vacancies in HfO2 layer were caused by incompletely oxidized Y (substoichiometric) atoms. After that, the N atoms during TiN deposition would fill the oxygen vacancies, forming HfON layer which had lower κ-value.
In addition, the Y/PO cases possessed better reliability and thermal stability. Through the constant voltage stress (CVS) measurement, the Y/PO cases presented less Dit degradation and also had lowerΔQox. In our experiments about the thermal stability of IL, the results showed that the Y/PO ILs could effectively suppress the GeO vaporization and Ge diffusion.
Finally, Ge p-MOSFETs with various ILs (HfO2/AlOx/HfO2/TiN) gate stack were successfully demonstrated. The electrical results showed that the MOSFETs with the Y/PO IL had larger Ion/Ioff ratio (~4 orders), higher effective hole mobility (~908 cm2V-1s-1) and better subthreshold swing (S.S.) (~95 mV/dec) than those with the PO IL.
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