Effects of Structure Geometry on the Device Characteristics of Vertical Gate SONOS Memory
碩士 === 國立交通大學 === 電子研究所 === 106 === To reduce bit cost and increase bit density, the adoption on 3D stacking architecture in flash memory is inevitable, which introduces plenty of process and device geometry issues. In this thesis, the field enhancement effect induced by the corners of rectangular B...
| Main Authors: | , |
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| Other Authors: | |
| Format: | Others |
| Language: | en_US |
| Published: |
2018
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| Online Access: | http://ndltd.ncl.edu.tw/handle/d33trs |