Study of enhancement in brightness of Chip Scale Package

• Main Authors: Sheng-hung Hsu, 許勝閎
• Other Authors: Fang-I Lai
• Format: Others
• Language: zh-TW
• Published: 2017
• Online Access: http://ndltd.ncl.edu.tw/handle/ntvkyy

碩士 === 元智大學 === 光電工程學系 === 105 === CSP is the latest memory wafer packaging technology. It allows wafer area and packaging area ratio exceeds 1: 1.14 and it is almost close to 1: 1. The absolute size is only 32mm2, which is one-third of ordinary BGA packaging, and one-sixth of TSOP package. Comparing to the BGA package, the storage capacity of CSP package can be three times more than BGA. The overall luminous efficacy of epi has got close to the physical limits; the room for improvement is limited. In order to improve the efficient of lightening to the chip unit, increasing the size of chip or changing the packaging type are relatively feasible. The goal of this research is to propose new method of CSP in the perspective of cost down, to develop new efficient CSP with principle of LED and characteristics of the phosphor. By adjustment the proportion of phosphor, let the specification of samples be much similar. Choosing one of the samples to be control group, and silicone is used to add in other experiment group. This research simulates with TRACEPRO, use silicone as a reflecting surface to make several light paths totally reflected through the phosphor, and eventually achieve the purpose to enhance the brightness. The result of this research shows that the reflection through the silicone of CSP can increase the efficient of lighting from four to twelve percentages much more than currently. The simulation result shows the lightning can be increase ten percentages if increasing the area of silicone from 1.3mm*1.3mm to 2mm*2mm. Further, the lightening can even increase thirty-two percentages by changing the structure to Dome lens type.