Low-Skew High-Speed Low-Power Four-Channel Time-Interleaved SAR ADC
碩士 === 國立臺灣大學 === 電子工程學研究所 === 105 === As the advantage of wireless communication system, the requirement for high speed sampling rate and medium resolution gradually increase. A 10-bit 1GS/s time-interleaved SAR ADC is presented in 40nm general process of CMOS technology in this thesis. This th...
| Main Authors: | , |
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| Other Authors: | |
| Format: | Others |
| Language: | en_US |
| Published: |
2016
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| Online Access: | http://ndltd.ncl.edu.tw/handle/bu4g43 |