Assisted Design Optimization using High-Level Synthesis Flow
碩士 === 國立清華大學 === 資訊工程學系 === 105 === Current research works in accelerator designs mainly relies on register-transfer level (RTL)- based flows to obtain accurate timing, power, and area estimations. Pre-RTL synthesis tool such as Aladdin [1] can also be used to obtain approximately accurate estimati...
| Main Authors: | , |
|---|---|
| Other Authors: | |
| Format: | Others |
| Language: | en_US |
| Published: |
2016
|
| Online Access: | http://ndltd.ncl.edu.tw/handle/tjtxd3 |