| Summary: | 碩士 === 國立東華大學 === 物理學系 === 105 === Resistance switching in ZnO-based memristive devices with a p-n junction has been investigated. Sputtering was performed to prepare devices with layered structures as Ti/ZnO/p+-Si. Programming strategies were developed in terms of using different operation modes, including voltage sweep mode, current sweep mode, and single-pulse mode. The single-pulse mode was found to suppress the multiplicity of the readout resistance levels as compared with the voltage/voltage sweep modes. Furthermore, current compliance was found to significantly affect the device stability during repeated switching operations. Conduction processes leading to the resistive switching were examined for the low-resistance and high-resistance states, conforming the mechanisms dominated by space charge limited current (SCLC) and Poole-Frenkel (PL) trap-associated processes respectively. Instability and device failures were attributed to structural imperfections resulting from preparations.
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