Application of TRIZ Method and Experimental Design for Semiconductor Process Improvement
碩士 === 國立交通大學 === 理學院應用科技學程 === 105 === It is usual in semiconductor manufacturing process to perform a via-hole process in the inter-metal dielectric layer (IMD), and then filled in metal to form a vertical metal plug (also known as “Via Plug” ) to connect two metal layers on different planes. The...
| Main Authors: | , |
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| Other Authors: | |
| Format: | Others |
| Language: | zh-TW |
| Published: |
2017
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| Online Access: | http://ndltd.ncl.edu.tw/handle/p23r29 |