| Summary: | 博士 === 國立交通大學 === 材料科學與工程學系所 === 105 === A hybrid process of mechanical grinding and chemical dispersion was adopted to fabricate the nano-scale In2O3, Ga2O3, and ZnO powders for the preparation of 2-inch, single-phase InGaZnO4 (IGZO) sputtering target. The amorphous IGZO (a-IGZO) layers were then deposited by utilizing the self-prepared IGZO target and separately served as the active channel layer of thin-film transistor (TFT) and resistive switching (RS) layer of fully transparent resistive random access memory (TRRAM) devices. The operational properties, microstructures and compositions of devices were analyzed. The experimental works are divided into three parts and briefly described as follows.
In first part of study, poly(methacrylic acid) (PMAA) was adopted as the chemical dispersant to prepare the nano-scale In2O3, Ga2O3, and ZnO powders via a hybrid process of mechanical grinding and chemical dispersion. By adding 3 wt.% of PMAA in the suspension, the nano-scale oxide powders with the mean particle size (d50) about 53 nm could be achieved. Consequently, the single-phase IGZO sputtering target with theoretical density of 93% could be obtained via the pressure-less sintering at 1300C for 6 hrs in air ambient.
In second part of study, TFT devices containing a-IGZO as the active channel layers were prepared by sputtering deposition within above-mentioned IGZO target. Electrical characterizations indicated that the best device performance with saturation mobility (sat) of 14.7 cm2V1sec1, threshold voltage (Vth) of 0.57 V, subthreshold gate swing (S.S.) of 0.45 Vdecade1 and on-off ratio (Ion/Ioff) of 108 could be achieved in TFT sample subjected to a post annealing at 300C for 1 hr. The influence of Ar/O2 inlet gas flow ratios of sputtering process on TFT performance was also investigated and the best electrical properties (sat = 5.1 cm2V1sec1, Vth = 1.2 V, S.S. = 0.9 Vdecade1 and Ion/Ioff = 5106) was observed in TFT prepared at the Ar/O2 inlet gas flow ratio of 20:0.6. In order to clarify the influence of defect structures on device performance, the metal-oxide-semiconductor (MOS) and metal-insulator-metal (MIM) structures were prepared. It is illustrated that appropriate post annealing might suppress the interfacial traps density (Dit) to promote the TFT performance.
In third part study, TRRAM containing a-IGZO as the RS layer and indium tin oxide and indium zinc oxide transparent conducting oxides as the electrodes were prepared. The transmittance of TRRAM exceeded 80% in visible-light wavelength range. The TRRAM exhibited the forming-free feature and the best electrical performance (VSET = 0.61 V; VRESET = 0.76 V; RHRS/RLRS (i.e., the R-ratio) > 103) was observed in the device subject to 300C annealing for 1 hr. Such a sample also exhibited satisfactory endurance and retention properties as revealed by the reliability tests. The TRRAM could operate more than 106 times and maintained its R-ratio after 104 sec of test. The electrical properties were measured in the ambient with various atmospheric pressures for clarify the role of oxygen vacancies ( ) in the RS behaviors of TRRAM. The decrease of pressure implied the increasing number of in RS layer, meaning the number of charge carriers in RS layer would simultaneously increases. The abundance of charge carriers facilitated the formation of conduction filament and, accordingly, promoted the charge trapping/de-trapping process. This demonstrated that the RS mechanism in our TRRAM closely relates to the charge trapping/de-trapping processes and the modulation of content in RS layer might enhance the TRRAM performance.
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