Fibonacci Pattern Run-Length for Test Data Compression
碩士 === 元智大學 === 資訊工程學系 === 104 === The density of integrated circuits increases lead to the VLSI technology grows up. Therefore, testing for integrated circuit is more and more complex. Many new techniques have been proposed to reduce test data volume so as to save memory cost and improve the transm...
| Main Authors: | , |
|---|---|
| Other Authors: | |
| Format: | Others |
| Language: | zh-TW |
| Published: |
2016
|
| Online Access: | http://ndltd.ncl.edu.tw/handle/99478416818766343777 |