Spur Reduction of 1.5GHz Frequency Synthesizer by using Delay-locked Loop techniques
碩士 === 大同大學 === 電機工程學系(所) === 104 === In suppressing reference spurs, both the current mismatch improvement of charge pump and the periodicity of reference signals disarragement are usually used to reduce reference spurs. Therefore, The delay locked loop(DLL) techniques is adopted in this thesis.The...
| Main Authors: | , |
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| Other Authors: | |
| Format: | Others |
| Language: | zh-TW |
| Published: |
2016
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| Online Access: | http://ndltd.ncl.edu.tw/handle/23703987675070232038 |