A DIGITALLY CALIBRATED 11-BIT 10-MS/s SAR ADC WITH MONOTONIC SWITCHING SPLIT CAPACITOR ARRAY
碩士 === 大同大學 === 電機工程學系(所) === 104 === In this thesis, a digitally calibrated 11 bit 10MS/s asynchronous differential SAR ADC is presented. A monotonic capacitor switching procedure is used in the design, such that the input pair of the comparator converges to the ground. In this structure, the diffe...
| Main Authors: | , |
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| Other Authors: | |
| Format: | Others |
| Language: | zh-TW |
| Published: |
2016
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| Online Access: | http://ndltd.ncl.edu.tw/handle/89282578310273443460 |