Compiler and Architecture Support for Affine Register File on GPU
碩士 === 國立清華大學 === 資訊工程學系 === 104 === Graphic Processing Units (GPUs) are designed with a large number of threads to achieve high throughput and performance improvement. For rapidly switching to a different task, each thread has its own registers to store its context. These numerous register files pl...
| Main Authors: | , |
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| Other Authors: | |
| Format: | Others |
| Language: | en_US |
| Published: |
2016
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| Online Access: | http://ndltd.ncl.edu.tw/handle/tz9wbf |