A Workbench for Fault-Tolerant Microprocessor with Multiple HW/SW Approaches
碩士 === 國立中山大學 === 資訊工程學系研究所 === 104 === We present an integrated development environment (IDE) with GUI for generating and evaluating the fault-tolerant microprocessor. Designer can select from hardware options (dual-core for microprocessor, error detection code or error correction code for memory)...
| Main Authors: | , |
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| Format: | Others |
| Language: | en_US |
| Published: |
2015
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| Online Access: | http://ndltd.ncl.edu.tw/handle/838rm6 |