Design, Simulation and Analysis of Depletion-mode Power MOSFET

• Main Authors: Wei-Shao Liu, 劉為劭
• Other Authors: Yue-Ming Hsin
• Format: Others
• Language: zh-TW
• Published: 2016
• Online Access: http://ndltd.ncl.edu.tw/handle/60785853034112960245

碩士 === 國立中央大學 === 電機工程學系 === 104 === This research demonstrated the design, analysis, simulation, and characterization of a depletion-mode Power MOSFET with the rated breakdown voltage of 150 V and threshold voltage of -5 V. Impacts of different process conditions on both breakdown voltages and threshold voltages have been discussed and investigated by the simulation using TCAD software. Process sensitivity was also taken account to match the real situation. Devices fabrication were performed on 6-inch silicon wafer and some of them were packaged in SOT-23 form. Moreover, the edge termination was discussed and simulated with considerations in number of guard rings, distance from active area to 1st guard ring and effect of field plate. The optimized design of termination showed breakdown voltage over 150 V, which met the target of active area region. By comparison of simulation results and measurement data, the electrical and physical parameters of MOSFET were extracted via appropriate procedure. An equivalent circuit for HSPICE model was proposed and combined with test circuits to demonstrate the performance of fabricated MOSFET. The simulation using proposed equivalent circuit includes the characteristics of conduction, breakdown and capacitance have been accomplished. Using TCAD device process/characteristics simulator and HSPICE circuit software to fully describe the characteristics of this device and bring an appropriate equivalent model so that application circuit design can be implemented successfully.