Impact of Spacer Design on Electrostatic Integrity and Performance of Multi-Gate InGaAs-OI FinFETs
碩士 === 國立交通大學 === 電子工程學系 電子研究所 === 104 === This thesis investigates the impacts of spacer design for multi-gate InGaAs-OI FinFETs with self-aligned contact using TCAD simulations. Our study indicates that vacuum spacer can mitigate the degradation of electrostatic integrity induced by higher-k gate...
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| Format: | Others |
| Language: | zh-TW |
| Published: |
2015
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| Online Access: | http://ndltd.ncl.edu.tw/handle/7nu6be |