A High-gain High-speed Fully-integrated CMOS Optical Receiver
碩士 === 國立雲林科技大學 === 電子工程系 === 103 === A high-gain high-speed fully-integrated CMOS optical receiver designed in UMC 0.18μm 1P6M CMOS process technology for visible light wireless communications is presented in this thesis. The regulated cascade (RGC) gain stage is adopted before the transimpedance a...
| Main Authors: | , |
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| Other Authors: | |
| Format: | Others |
| Language: | zh-TW |
| Published: |
2015
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| Online Access: | http://ndltd.ncl.edu.tw/handle/20175329597308832334 |