New Vcm-Based Subranging SAR ADC with Separated Capacitor Switching Technique
碩士 === 國立臺北科技大學 === 電子工程系研究所 === 103 === This paper initially describes the SA algorithm, architecture, different types of DAC and comparator, dynamic and static parameters. Finally, based on the above studies, the first part of this thesis is 10-bit 30MS/s Subranging SAR ADC with Triple Reference V...
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| Format: | Others |
| Online Access: | http://ndltd.ncl.edu.tw/handle/xus5au |