Interleavers of Two-Dimensional Parity Check Codes for Fast Correcting Cluster Errors in TSV Arrays of 3D-ICs
碩士 === 國立彰化師範大學 === 電子工程學系 === 103 === Three dimensional integration of integrated circuits has been proved to be the major key infra-structure for extending and even exceeding the Moore's Law. However the yield of through-silicon vias (TSVs) of the 3D-ICs is still limited. According to the inc...
Main Authors: | , |
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Other Authors: | |
Format: | Others |
Language: | zh-TW |
Published: |
2015
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Online Access: | http://ndltd.ncl.edu.tw/handle/54356066059626269600 |