Design and Analysis of 24GHz Low Power and High Gain Receiver Front-End Structure
碩士 === 國立交通大學 === 電信工程研究所 === 103 === This thesis consists of three parts. All the proposed circuit were implemented in TSMC 0.18μm mixed-signal/RF CMOS 1P6M technology. Part I present a three-stage wideband LNA design in k-band. This LNA design use two-stage common-source and one-stage cascode...
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| Format: | Others |
| Language: | en_US |
| Published: |
2014
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| Online Access: | http://ndltd.ncl.edu.tw/handle/65352360093279126647 |