| Summary: | 碩士 === 國立交通大學 === 電子工程學系 電子研究所 === 103 === In this thesis, we successfully fabricated nickel indium gallium arsenide alloy by post metal annealing (PMA) at 250 C in N2 for 1 min. Moreover, the sheet resistance of Ni-InGaAs was lower than InGaAs doped with n-type. The Shottcky barrier height for electron was about 0.16 eV and the on/off ratio of Shottcky junction was about 1.1104.
Secondly, InGaAs NMOSFETs on InP substrate with self-aligned nickel S/D was manufactured successfully. The on/off ratio was about 8.1103, the subthreshold swing was around 191 mV/dec, and the low source/drain resistance of 11 km were achieved. The peak mobility was about 1138 cm2/V-s. Moreover, we discussed the difference between the conductance method and the full-conductance method. The Dit extracted by the full-conductance method was about 11012 cm-2eV-1 at ET = EV + 0.6 eV. By charge pumping extraction, the border trap density was around 1019 to 1020 cm-3eV-1 situated at ET - EC -1.3 eV to -1.65 eV and the depth of border trap was from 16 Å to 22 Å. Border traps had large impact on subthreshold swing.
Finally, InGaAs NMOSFETs on Si substrate with self-aligned nickel S/D was fabricated successfully. A high drive-current of 85 A/m at VG-VT = 1.6 V and VD = 2 V was achieved. However, the NMOSFETs demonstrated larger leakage current than InGaAs NMOSFETs on InP substrate that might be due to the defects of channel layer.
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