MMU Cache System and Thread Block Scheduling Enhancement for Virtual Memory Support on GPGPU
碩士 === 國立交通大學 === 資訊科學與工程研究所 === 103 === As “Dark silicon” phenomenon becomes obvious in advanced process, the performance of IC will soon be bounded by the power budget. Investigation on the design of customized hardware accelerator gradually takes the place of mainstream research on CPU. Graph...
| Main Authors: | , |
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| Other Authors: | |
| Format: | Others |
| Language: | en_US |
| Published: |
2014
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| Online Access: | http://ndltd.ncl.edu.tw/handle/88587440284789983325 |