A Study of Memory Transistor Comprised of Thin-film Transistor and Nonvolatile Floating Gate Memory

• Main Authors: Peng, Tzu-Hsuan, 彭子瑄
• Other Authors: Hsieh,Tsung-Eong
• Format: Others
• Language: zh-TW
• Published: 2014
• Online Access: http://ndltd.ncl.edu.tw/handle/62890518263582294112

碩士 === 國立交通大學 === 材料科學與工程學系所 === 103 === Preparation and characterizations of the memory transistor (MT) with 1-transistor-and-1-capacitor device structure by combining the InGaZnO (IGZO) thin-film transistor and the nonvolatile floating gate memory (NFGM) containing AgInSbTe (AIST)-SiO2 nanocomposite layer as the charge storage layer are investigated. First, Si wafer as the substrate and thermally grown SiO2 gate dielectric layer were utilized to prepare MT sample in order to verify that the feasibility of IGZO TFT and AIST NFGM to MT architecture. Secondly, the FTO glass substrate and SiNx/SiO2 composite gate dielectric grown by plasma-enhanced chemical vapor deposition were adopted for MT preparation. It was found that, with an annealing at 200C for 60 sec, MT sample containing SiNx(10 nm)/SiO2(90 nm) composite gate dielectric structure exhibits the best electrical properties of Ig = 0.11 A, VTH = 2 V, on/off ratio = 4.3×104, sat = 8.2 cm2V−1sec−1, SS = 2.5 Vdecade−1 and VTH,MT = 8.7. In addition, a fairly good retention property of 22.7% degradation of memory window (VTH,MT) was observed after the retention test for 104 sec. In third part of study, the source/drain electrodes of MT samples accomplished previously were replaced by Mo/ITO layer so as to fabricate the fully transparent MT device. With an about 70% transparency in visible-light wavelength range, the MT device somehow exhibited an inferior electrical performance compared with the device with Al as the electrodes, i.e., Ig = 0.68 A, VTH = 3.8 V, On/Off Ratio = 6.5×102, sat = 0.38 cm2V−1sec−1, SS = 4.8 Vdecade−1, VTH,MT = 2.4 V. The degradation of electrical properties was ascribed to the increment of contact resistance at the interface of Mo and IGZO. X-ray photoelectron spectroscopy revealed the annealing at 200C might effectively reduce the crystalline defects in the samples and improve the electrical properties; nevertheless, the annealing at 300C caused the oxidization of Sb in AIST nanocrystals and jeopardized the memory capability of MT samples.