Effect of TSV-Induced Stresses on Carrier Mobility and Strength of 3-D IC Chips

博士 === 長庚大學 === 機械工程學系 === 103 === The 3-D integration of integrated circuit (IC) chips is to bring significant benefits to IC packaging by providing better electrical performance, lower power consumption, and smaller form factor. Currently the technology of through-silicon via (TSV) is one of most...

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Bibliographic Details
Main Authors: Pu Shan Huang, 黃溥膳
Other Authors: M. Y. Tsai
Format: Others
Published: 2014
Online Access:http://ndltd.ncl.edu.tw/handle/64049970167383966013