Hardware-Efficient Triple-Modular-Redundancy Soft-Error-Tolerant Arithmetic Circuit Architecture Design
碩士 === 長庚大學 === 電機工程學系 === 103
| Main Authors: | , |
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| Other Authors: | |
| Format: | Others |
| Published: |
2015
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| Online Access: | http://ndltd.ncl.edu.tw/handle/4ta3yt |