Memory Management for Dual-addressing Memory Architecture
碩士 === 元智大學 === 資訊工程學系 === 102 === With the increasing latency gap between processor and memory, the commodity DRAM has become one of performance bottlenecks in a computing system. Dual-addressing memory was proposed to support two-dimensional (row-major and column-major) memory accesses for high pe...
Main Authors: | , |
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Other Authors: | |
Format: | Others |
Language: | zh-TW |
Online Access: | http://ndltd.ncl.edu.tw/handle/41612172721348974588 |