TESTING OF ASYNCHRONOUS QDI FSMs
碩士 === 大同大學 === 資訊工程學系(所) === 102 === Quasi-Delay Insensitive(QDI) circuits are the most robust circuits that can be built and prevent from PVT (Process, Voltage, Temperature) impact . This thesis focuses on how to test ROC QDI finite state machines, using the stuck-at fault model. We use D-algorith...
| Main Authors: | , |
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| Other Authors: | |
| Format: | Others |
| Language: | zh-TW |
| Published: |
2014
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| Online Access: | http://ndltd.ncl.edu.tw/handle/y7ve7a |