A High Resolution Field Programmable Gate Array Time-to-Digital Converter Based On Delay Wrapping And Phase Sorting
碩士 === 國立臺灣科技大學 === 電子工程系 === 102 === A high resolution FPGA time-to-digital converter based on delay wrapping and phase sorting to achieve an extremely fine resolution of 1ps is proposed in this thesis. A single clock passed a series of delay elements is used to generate multiple reference clocks w...
| Main Authors: | , |
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| Other Authors: | |
| Format: | Others |
| Language: | zh-TW |
| Published: |
2014
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| Online Access: | http://ndltd.ncl.edu.tw/handle/32700484143504810040 |