A Scratchpad Memory for High-Level Synthesis Compiler on FPGA
碩士 === 國立臺灣大學 === 電機工程學研究所 === 102 === High-level synthesis (HLS) compilers usually provide some supported target architectures that can be chosen by users; however, the limited architectures may not fit the requirements of underlying systems. In this paper, we propose a target architecture embedded...
| Main Authors: | , |
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| Other Authors: | |
| Format: | Others |
| Language: | en_US |
| Published: |
2014
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| Online Access: | http://ndltd.ncl.edu.tw/handle/32114476201338759594 |