Model Checking RT-Level Hardware Systems
博士 === 國立臺灣大學 === 電子工程學研究所 === 102 === Model checking, or property checking, is a classic methodology for formally verifying a hardware system. More specifically, given a system and a set of properties, model checkers judge whether the system satisfies a property or not. However, due to the high com...
| Main Authors: | , |
|---|---|
| Other Authors: | |
| Format: | Others |
| Language: | en_US |
| Published: |
2014
|
| Online Access: | http://ndltd.ncl.edu.tw/handle/76601859990180165600 |