Design of Timing-Error-Tolerant VLSI Circuits for RSA Encryption and Decryption

碩士 === 國立東華大學 === 電機工程學系 === 102 === As the feature size of chips shrinks with semiconductor technology advancing, the size of transistors and their operating voltage keep decreasing. One of the major problems with advanced semiconductor technology is timing errors caused by process variation and de...

Full description

Bibliographic Details
Main Authors: Tsung-Han Wu, 吳宗翰
Other Authors: Hsin-Chou Chi
Format: Others
Published: 2014
Online Access:http://ndltd.ncl.edu.tw/handle/p868td