An Ultra-Fast Response and Low Power Digital Low Dropt Output for High Speed Embedded Memory
碩士 === 國立交通大學 === 電機學院電機與控制學程 === 102 === This work discussed the proposed digital LDO(Low Drop Output) application to high speed response and low power consumption, and integrate conventional LDO with the SRAM IP modulated. The proposed low quiescent current digital LDO with wide range operating...
| Main Authors: | , |
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| Other Authors: | |
| Format: | Others |
| Language: | zh-TW |
| Published: |
2014
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| Online Access: | http://ndltd.ncl.edu.tw/handle/47897728040635451919 |