On Chip Power Grid Transient Simulation in Linear Complexity Based on Alternating Direction Implicit-Latency Insertion Method
碩士 === 國立交通大學 === 電信工程研究所 === 102 === With the increasing transistor density and the lowering power supply voltage, the robust and stable power delivery network (PDN) is demanded to support devices on chip. Power grid transient analysis is necessary during the design process to ensure the quality of...
| Main Authors: | , |
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| Other Authors: | |
| Format: | Others |
| Language: | en_US |
| Published: |
2013
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| Online Access: | http://ndltd.ncl.edu.tw/handle/53538921090458276643 |