Design and Implementation of LDPC Decoder for NAND FLASH Memory
碩士 === 國立交通大學 === 電子工程學系 電子研究所 === 102 === In the conventional NAND flash memory system, BCH code has been widely used due to its simplicity in hardware implementation when hard input is adopted. However, as the shrinking of manufacturing process and the increasing number of bits stored per flash me...
| Main Authors: | , |
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| Other Authors: | |
| Format: | Others |
| Language: | en_US |
| Published: |
2013
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| Online Access: | http://ndltd.ncl.edu.tw/handle/19156285279376699609 |