Adaptive Cache Replacement Policies to Increase Hit Rate of
碩士 === 國立交通大學 === 資訊科學與工程研究所 === 102 === Load-to-use latency is one of the key factors to influence microprocessor performance. Because load instruction usually has long execution latency and take large portion of total instructions at run time. Early execute load instructions is a way to reduce...
| Main Authors: | , |
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| Other Authors: | |
| Format: | Others |
| Language: | en_US |
| Published: |
2013
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| Online Access: | http://ndltd.ncl.edu.tw/handle/y2b8ky |