| Summary: | 碩士 === 國立成功大學 === 電機工程學系 === 102 === As the ever-increasing performance requirements of SOC and process technology scaling, the power density of system-on-a-chip (SOC) increases accordingly and creates high temperature on the chip. Since thermal issues have negative impacts on IC reliability and performance, they have become important design constraints. At the same time, the concept of electronic system level design has been proposed for improving development efficiency as system complexity of SOC increases, the developers can build a virtual platform for the target SOC at a higher level of abstraction to perform quick software and hardware co-simulations and co-verifications at early stage of design. Considering thermal issues have become important design constraints, the developers should add thermal profiling mechanisms to the virtual platform. In thermal analyses, the transient thermal analysis can provide a dynamic on-chip temperature trend, which is a useful information for developing temperature management mechanisms. However, as the computation complexity increases, the transient thermal analysis speed decreases dramatically.
This thesis uses not only GPU to assist the transient thermal analysis of Cooling Hotspot [4] thermal simulator, but also proposes a Virtual-Row Compressed Sparse Row sparse matrix vector multiplication algorithm to replace the ordinary matrix vector multiplication., Furthermore, a thermal frame computing load reduction method is devised to further improve the efficiency of GPU-assist computation. After applying the proposed methods, the speedup is about 10.455 times larger compared to the original Cooling Hotspot.
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