A Study on Array Transient Voltage Suppressor Circuit Simulation and Fabrication
碩士 === 國立成功大學 === 電機工程學系 === 102 === The research topic of this thesis is about the Transient Voltage Suppressor Array (TVS). A simulation based on the MicroSim PSpice software to analysis the changes of Electro Static Discharge (ESD) voltage will be carried out. The simulation method is defined by...
| Main Authors: | , |
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| Other Authors: | |
| Format: | Others |
| Language: | zh-TW |
| Published: |
2014
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| Online Access: | http://ndltd.ncl.edu.tw/handle/29632462547211579938 |