Back end anneal effect on negative bias temperature instability for PMOS in 30nm DRAM technology

Back end anneal effect on negative bias temperature instability for PMOS in 30nm DRAM technology

碩士 === 長庚大學 === 電子工程學系 === 102

Bibliographic Details
Main Authors:	Jen Te Hsu, 徐仁德
Other Authors:	C. S. Lai
Format:	Others
Published:	2014
Online Access:	http://ndltd.ncl.edu.tw/handle/25883628199738499105

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