Back end anneal effect on negative bias temperature instability for PMOS in 30nm DRAM technology
碩士 === 長庚大學 === 電子工程學系 === 102
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ndltd-TW-102CGU054280122015-10-14T00:18:18Z http://ndltd.ncl.edu.tw/handle/25883628199738499105 Back end anneal effect on negative bias temperature instability for PMOS in 30nm DRAM technology 後段熱退火對30nm DRAM製程中PMOS負偏壓溫度不穩定之效應探討 Jen Te Hsu 徐仁德 碩士 長庚大學 電子工程學系 102 C. S. Lai 賴朝松 2014 學位論文 ; thesis 104 |
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碩士 === 長庚大學 === 電子工程學系 === 102 |
author2 |
C. S. Lai |
author_facet |
C. S. Lai Jen Te Hsu 徐仁德 |
author |
Jen Te Hsu 徐仁德 |
spellingShingle |
Jen Te Hsu 徐仁德 Back end anneal effect on negative bias temperature instability for PMOS in 30nm DRAM technology |
author_sort |
Jen Te Hsu |
title |
Back end anneal effect on negative bias temperature instability for PMOS in 30nm DRAM technology |
title_short |
Back end anneal effect on negative bias temperature instability for PMOS in 30nm DRAM technology |
title_full |
Back end anneal effect on negative bias temperature instability for PMOS in 30nm DRAM technology |
title_fullStr |
Back end anneal effect on negative bias temperature instability for PMOS in 30nm DRAM technology |
title_full_unstemmed |
Back end anneal effect on negative bias temperature instability for PMOS in 30nm DRAM technology |
title_sort |
back end anneal effect on negative bias temperature instability for pmos in 30nm dram technology |
publishDate |
2014 |
url |
http://ndltd.ncl.edu.tw/handle/25883628199738499105 |
work_keys_str_mv |
AT jentehsu backendannealeffectonnegativebiastemperatureinstabilityforpmosin30nmdramtechnology AT xúréndé backendannealeffectonnegativebiastemperatureinstabilityforpmosin30nmdramtechnology AT jentehsu hòuduànrètuìhuǒduì30nmdramzhìchéngzhōngpmosfùpiānyāwēndùbùwěndìngzhīxiàoyīngtàntǎo AT xúréndé hòuduànrètuìhuǒduì30nmdramzhìchéngzhōngpmosfùpiānyāwēndùbùwěndìngzhīxiàoyīngtàntǎo |
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1718088406208086016 |