Rule-Based Redundant Via-Aware Standard Cell Design Considering Multiple Via Mechanism
博士 === 國立臺灣科技大學 === 電子工程系 === 101 === Via failure persists despite nanometer-scale advances in semiconductor manufacturing technology. The conventional cell-based design improves via yield and reliability by adding redundant vias in routing for VLSI designs. Doing so can improve the yield by 10X-100...
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| Format: | Others |
| Language: | en_US |
| Published: |
2013
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| Online Access: | http://ndltd.ncl.edu.tw/handle/60762772270483027901 |