| Summary: | 碩士 === 國立臺灣大學 === 電子工程學研究所 === 101 === Extreme Ultraviolet Lithography (EUVL) is one of the most promising lithography technologies for next generation, but EUVL suffers from the flare effects (i.e., scattered light) which cause critical dimension (CD) distortion and damage CD uniformity. Moreover, Chemical Mechanical Polishing (CMP) is an important process which planarizes silicon oxide, metal, and polysilicon surfaces in modern IC manufacturing. Both of the manufacturability issues are highly related to layout pattern distribution. However, there is a trade-off between the two techniques because the desirable pattern distributions for EUV flare and CMP optimization are different. To minimize EUV flare effects, a concave density distribution is preferred, where the center of a chip has higher density than periphery regions. On the other hand, CMP optimization tends to keep the density distribution uniform. In addition to control layout pattern distribution, placement is a critical stage in VLSI design flow because the positions of circuit blocks would significantly affect metal distribution. In this thesis, we propose the first work of EUV flare- and CMP-aware placement that considers the two manufacturability issues and optimize wirelength simultaneously. Besides, we propose a sigmoid distribution model to approximate the optimal EUV flare-aware density distribution for EUV flare effect optimization. To evaluate the metal density during the placement stage, we present a metal-aware pin model to estimate metal distribution. At last, we use a non-linear optimization method to achieve good placement results. The experimental results show that our proposed algorithms can effectively and efficiently achieve the placement solutions with optimized EUV flare effects, the CMP cost, and wirelength.
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