Analysis of Turn-on Behavior for PD SOI NMOS Device Considering Back Gate Bias Effect
碩士 === 國立臺灣大學 === 電子工程學研究所 === 101 === This paper describes the back gate bias effect for partially depleted silicon-on-insulator N-type device (PD-SOI NMOS). At first, Chapter 1 introduces silicon-on-insulator MOS devices and its key characteristics, and compares the trends for PD-SOI MOS, FD-SOI M...
| Main Authors: | , |
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| Other Authors: | |
| Format: | Others |
| Language: | zh-TW |
| Published: |
2012
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| Online Access: | http://ndltd.ncl.edu.tw/handle/75691200950595602167 |