Design of Null Convetion Logic (NCL) Pipelines with Power Gating
碩士 === 國立彰化師範大學 === 電子工程學系 === 101 === Abstract As the feature size continues to shrink and the corresponding transistor density increases, power dissipation has become an important concern in nanoscale CMOS VLSI design. Power gating is one of the most effective techniques for leakage reduction. On...
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| Format: | Others |
| Language: | zh-TW |
| Published: |
2013
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| Online Access: | http://ndltd.ncl.edu.tw/handle/91419208309610888204 |