C/V band Fully Integrated Silicon-based Wideband Power Amplifiers

碩士 === 國立中央大學 === 電機工程學系 === 101 === Both the C-band and V-band fully integrated silicon-based power amplifiers are designed in the thesis, using 0.18 m and 90 nm CMOS processes by tsmcTM, respectively. In the first part, reactance compensation network is adopted for the circuit design for wideband...

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Main Authors: Yuan-Li Cheng, 鄭淵勵
Other Authors: Hwann-Kaeo Chiou
Format: Others
Language:zh-TW
Published: 2013
Online Access:http://ndltd.ncl.edu.tw/handle/46921727359357889385
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spelling ndltd-TW-101NCU054420672015-10-13T22:34:49Z http://ndltd.ncl.edu.tw/handle/46921727359357889385 C/V band Fully Integrated Silicon-based Wideband Power Amplifiers C/V頻段全積體整合矽製程之寬頻功率放大器研製 Yuan-Li Cheng 鄭淵勵 碩士 國立中央大學 電機工程學系 101 Both the C-band and V-band fully integrated silicon-based power amplifiers are designed in the thesis, using 0.18 m and 90 nm CMOS processes by tsmcTM, respectively. In the first part, reactance compensation network is adopted for the circuit design for wideband consideration; a 5-6 GHz class-E high efficiency power amplifier was implemented. In the second part, a high gain and wideband V-band power amplifier was implemented by adopting wideband matching network technique. Measurement results are summarized below: The 5-6 GHz class-E power amplifier fabricated in 0.18 m CMOS technology achieves a power gain of 5.45 dB, a saturation output power of 22.79 dBm, and a power-added-efficiency of 19.71%. The V-band power amplifier with high gain and wide-band in 90 nm CMOS Technology achieves a power gain of 21.8 dB, an output power at 1-dB gain compression point of 8.1 dBm, a saturation output power of 12.75 dBm, and a power-added-efficiency of 10.75%. Hwann-Kaeo Chiou 邱煥凱 2013 學位論文 ; thesis 67 zh-TW
collection NDLTD
language zh-TW
format Others
sources NDLTD
description 碩士 === 國立中央大學 === 電機工程學系 === 101 === Both the C-band and V-band fully integrated silicon-based power amplifiers are designed in the thesis, using 0.18 m and 90 nm CMOS processes by tsmcTM, respectively. In the first part, reactance compensation network is adopted for the circuit design for wideband consideration; a 5-6 GHz class-E high efficiency power amplifier was implemented. In the second part, a high gain and wideband V-band power amplifier was implemented by adopting wideband matching network technique. Measurement results are summarized below: The 5-6 GHz class-E power amplifier fabricated in 0.18 m CMOS technology achieves a power gain of 5.45 dB, a saturation output power of 22.79 dBm, and a power-added-efficiency of 19.71%. The V-band power amplifier with high gain and wide-band in 90 nm CMOS Technology achieves a power gain of 21.8 dB, an output power at 1-dB gain compression point of 8.1 dBm, a saturation output power of 12.75 dBm, and a power-added-efficiency of 10.75%.
author2 Hwann-Kaeo Chiou
author_facet Hwann-Kaeo Chiou
Yuan-Li Cheng
鄭淵勵
author Yuan-Li Cheng
鄭淵勵
spellingShingle Yuan-Li Cheng
鄭淵勵
C/V band Fully Integrated Silicon-based Wideband Power Amplifiers
author_sort Yuan-Li Cheng
title C/V band Fully Integrated Silicon-based Wideband Power Amplifiers
title_short C/V band Fully Integrated Silicon-based Wideband Power Amplifiers
title_full C/V band Fully Integrated Silicon-based Wideband Power Amplifiers
title_fullStr C/V band Fully Integrated Silicon-based Wideband Power Amplifiers
title_full_unstemmed C/V band Fully Integrated Silicon-based Wideband Power Amplifiers
title_sort c/v band fully integrated silicon-based wideband power amplifiers
publishDate 2013
url http://ndltd.ncl.edu.tw/handle/46921727359357889385
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