Electrical Performance and Reliability Investigation of Co-sputtered Cu/Ti as 3D Bonded Interconnect
碩士 === 國立交通大學 === 電子研究所 === 101 === Due to the physical and lithographical limitations, current scaling of transistors is reaching its bottleneck. To overcome this obstacle and continue to improve performance, the concept of 3D integration has been proposed. Current major efforts in 3D integration i...
| Main Authors: | , |
|---|---|
| Other Authors: | |
| Format: | Others |
| Language: | en_US |
| Published: |
2012
|
| Online Access: | http://ndltd.ncl.edu.tw/handle/26586480768621561098 |