Scenario-Aware Thermal Analysis in MPSoCs with 3D-Stacked Memories
碩士 === 國立暨南國際大學 === 資訊工程學系 === 101 === The 3D integration technology utilizes the low-latency and high density TSVs (Through Silicon Vias) to integrate memories and cores in the third dimension. Although the 3D integration technology provides abundant memory bandwidth, the power density also increas...
| Main Authors: | , |
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| Format: | Others |
| Language: | en_US |
| Published: |
2013
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| Online Access: | http://ndltd.ncl.edu.tw/handle/09404284358722487003 |