Hardware Design for JPEG Image Decoder
碩士 === 國立成功大學 === 電機工程學系碩博士班 === 101 === In this paper, we propose hardware design for JPEG image decoder. The design process of decoder is handled JPEG header file. Then it handled variable length decoding and inverse quantization. We use inverse zig-zag scan rearrange the data, and use the two...
| Main Authors: | , |
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| Other Authors: | |
| Format: | Others |
| Language: | zh-TW |
| Published: |
2013
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| Online Access: | http://ndltd.ncl.edu.tw/handle/15216442530660602971 |